by Rob Williams on August 19, 2008 in Intel Developer Forum
Intel opened up about their Nehalem architecture at this summer’s IDF, and while we are unable to talk about performance data, what we can talk about is of great interest. Read on as we take a brief look at Turbo Mode, HyperThreading, CPU and Memory overclocking, the triple-channel memory controller and much more.
The first day of Intel’s Developer Forum has drawn to a close, and if I can say one thing with certainty, it’s that Nehalem has been receiving no shortage of attention. Most of it is for great reason, and so I’ll touch up on as much about the upcoming processor as I can here.
We’ve covered Nehalem in some detail in the past, but this IDF is when Intel really began taking the curtain off of what makes the new processor ‘tick’, and what we can expect for improvements. Being part of the ‘Tick’ part of the new phase, Nehalem is a rather major microarchitecture development that could very-well make current-gen CPUs look a little weak.
Like the current-gen processors from Intel, Nehalem will release different models over time that fit into different categories. The first to the market (although the first Extreme desktop processor could very-well launch at the same time) will be the server and workstation CPUs, as seen in the below photo. The high-end desktop will sit under the Core i7 label, while other mainstream and notebook CPUs will follow in time.
Intel has no desire to hold off on releasing a notebook counter-part, because the new architecture features new enhancements that make it a good CPU for all platforms, such as a robust power-saving solution, which leads us to ‘Turbo Mode’. Turbo Mode is similar in some regards to the old-school Turbo button found on your 386 computer, where pushing it will increase processor frequency or voltage.
Turbo Mode on Nehalem is interesting, because overall, the performance is degraded, but with a caveat. If a core or two are not needed at a particular time, they will be switched off. From that point, power will shift on over to the first core, essentially increasing performance in whatever’s running at the time. If you have a Quad-Core and two cores are not needed, then both Core 0 and 1 will increase in performance slightly. You shouldn’t expect amazing increases, but anything in the >>10% range seems reasonable.
Turbo Mode will -not- replace overclocking, and Intel will actually provide an option (or at least require the option in the BIOS) to disable it, as straight overclocking will prove much more sensible for those who are looking for the best-possible performance, and so Turbo Mode is somewhat needless. The nice thing, though, is that when Turbo Mode -is- in use, the CPU should actually use less power overall, given that three cores are turned off completely.
The memory situation of Nehalem is undoubtedly one of the most interesting aspects of the new architecture, and one I’ll do a lot of testing with once a chip hits our lab. The new triple-channel solution sounds odd at first, and well, it is odd, but what matters is that it’s efficient. Although Intel released no information on latency, they released information on raw bandwidth, and the differences shown is staggering.
What’s important to note is that at the same memory speed, bandwidth will be greatly improved in Nehalem over anything to precede it. Highly overclocked current-gen processors with the fastest memory on the market will not even reach what Nehalem is capable of… even with DDR3-1066 memory. So while the overall memory frequency is low (to what we are now used to), the intense performance gains negate any downside.
But again, no latency information was given, and whether or not it will effect anything is yet to be seen, and can only be exposed with some in-depth testing. So the question many are having is about using faster memory. Intel, as they always have, gives us conservative ratings, and DDR3-1066 to them is a great speed for Nehalem, as exposed by the results above. Enthusiasts will be able to use faster memory, just like they always have.