Intel’s Pat Gelsinger announced today that Intel has published the white paper on its SSE4 instructions that will appear in its next-generation 45nm products. The new SSE4 instructions add 50 new performance enhancing instructions. These instructions optimize vector compiling, media, string and text processing and application targeted accelerators.
Don’t expect the benefits of SSE4 anytime soon… we won’t see it implemented until late next year in Intels 45nm chips. Glad to see SSE4 takes care of PCMPEQQ and DPPS though. I almost lost sleep over not having those in SSE3.