Intel – Knights Corner, 50-core chips for HPC

During the International Supercomputing Conference, Intel announced plans to deliver products based on the Many Integrated Core (MIC) architecture, the successor to the Larrabee and Supercomputer Chip (SCC) projects. The first of which, codenamed ‘Knights Corner’, will use Intel’s 22nm manufacturing process and scale chips with more than 50 cores on a single chip. The targeted segment is the HPC market, including the likes of exploration, scientific research, climate and financial industries.

Design and development kits, codenamed ‘Knights Ferry’ are shipping to select developers. In the second half of 2010, Intel will expand the program with a greater selection of developer tools for the MIC architecture.

Intel then anounces its standing within the top 500 supercomputers, of which 408 or 82% of the current top 500 are powered by Intel Processors. There is also a brief announcement about the creation of the new ExaCluster Laboratory (ECL) in collaboration with Forschungszentrum Julich (FZJ) and ParTec. The lab will develop technologies, tools and methods to power petaflop and exaflop machines.

It appears Intel is keeping on track with its prediction back in 2006 about having 80-core chips comercially available within 5 years (by 2011). If only we had 80+ thread applications…

SANTA CLARA, Calif. and HAMBURG, Germany, May 31, 2010 – During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel® Many Integrated Core (MIC) architecture that will create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.